纳米银双面烧结SiC半桥模块封装技术

Nano-silver Double-sided Sintering Technology for SiC Half-bridge Module Packaging

中文关键词: 纳米银焊膏  双面烧结  无压烧结  SiC MOSFET  半桥模块

英文关键词: nano-silver paste  double-sided sintering  pressureless sintering  SiC MOSFET  half-bridge module

中文摘要:

      为满足雷达阵面高功率密度的需求，SiC宽禁带半导体器件在电源模块应用中逐步取代传统硅功率器件。传统焊接及导电胶粘工艺存在导电性能差、热阻大、高温蠕变等缺点，无法发挥SiC功率器件高结温和高功率的优势。纳米银烧结是大功率器件最合适的界面互连技术之一，具有低温烧结高温使用的优点和良好的高温工作特性。文中针对高功率电源模块大电流传输对低压降及高效散热的需求，基于高功率半桥电源模块开展了SiC芯片的纳米银双面烧结工艺技术研究，突破了成型银焊片制备、纳米银焊膏高平整度点涂、无压烧结等关键技术，并通过烧结界面微观分析以及芯片剪切强度和焊片剥离强度测试对烧结工艺参数进行了优化。最后对半桥模块进行了静态测试和双脉冲测试。该模块的栅极泄漏电流< 1.5 nA，开关切换时间< 125 ns，漏极电压过冲< 12.5%，满足产品应用需求。

英文摘要:

      To meet the requirement of high power density for radar arrays, SiC wide-band semiconductor devices gradually replace traditional silicon power devices in power modules. The traditional solder and conductive glue have the disadvantages of poor electrical conductivity, high thermal resistance and high temperature creep, so the advantages of the high junction temperature and high power density of SiC power devices cannot be exploited. Nano-silver sintering is one of the most applicable interface interconnection technologies for high power devices, which is sintering at low temperature and has good high temperature working characteristics. In order to realize the low voltage-drop and efficient heat dissipation for high current transmission of high power modules, this paper studies the nano-silver double-sided sintering technology for SiC chips based on high power half-bridge modules. The key technologies such as Ag clips forming, nano-silver paste high flatness spot coating, pressureless sintering are improved greatly. The sintering process parameters are optimized through the microstructure analysis of sintering interface and the tests of chip sheer strength and clip peel strength. Finally, static tests and double pulse tests are carried out for the half-bridge module. The gate leakage current of the module is less than 1.5 nA, the switching time is less than 125 ns and the drain voltage overshoot is less than 12.5%, which meet the product application requirements.